Interactive editions

MicroPython Release Notes

Browser-runnable, demo-driven walkthroughs of recent MicroPython releases — built and maintained by the Melbourne MicroPython Meetup.

Currently covering v1.24 – v1.28

All five pages live. Interactive editions of the last five MicroPython releases (v1.24 through v1.28) are now ready. Browse by release card below, or use the per-port chart further down to find changes for your specific target.
Live
v1.28
April 6, 2026
PWM on alif and stm32, a standardised machine.CAN API, PEP 750 template strings, and the weakref module.
Read the interactive notes →
 Live
v1.27
December 10, 2025
ESP32-C5, ESP32-P4 and STM32U5 support, formal port Tier levels, unified pyexec REPL on unix/windows.
Read the interactive notes →
 Live
v1.26
August 9, 2025
machine.I2CTarget, the float-accuracy overhaul, native emitter wins, and the new STM32N6 and ESP32-C2 MCUs.
Read the interactive notes →
 Live
v1.25
April 16, 2025
ROMFS / VfsRom, the brand-new alif port, @micropython.asm_rv32 inline RISC-V assembler, DTLS support.
Read the interactive notes →
 Live
v1.24
October 26, 2024
RP2350 and ESP32-C6 support, RV32 native code emitter, common TinyUSB code, micropython.RingIO.
Read the interactive notes →

Browse by Port

Every MicroPython port is classified into one of four Tier levels (formalised in v1.27). Click a tier to filter the chart, or click any release chip on a port to jump to that release's notes — useful when you only care about what changed for a specific target.

esp32
Espressif ESP32 family
Tier 1
v1.24 v1.26 v1.27 v1.28
mimxrt
NXP i.MX RT
Tier 1
v1.25 v1.26 v1.27
rp2
Raspberry Pi RP2040 / RP2350
Tier 1
v1.24 v1.25 v1.26 v1.27
samd
Microchip SAMD21 / SAMD51
Tier 1
v1.25 v1.26 v1.27
stm32
ST STM32 (F0/F4/F7/G0/G4/H5/H7/L0/L1/L4/N6/U5/WB/WL)
Tier 1
v1.24 v1.25 v1.26 v1.27 v1.28
unix
Linux, BSD, macOS, WSL
Tier 1
v1.27
windows
Microsoft Windows
Tier 1
v1.27
alif
Alif Ensemble (E3, E7) — new in v1.25
Tier 2
v1.25 v1.26 v1.27 v1.28
embed
Embeddable .c/.h sources
Tier 2
·
nrf
Nordic nRF51 / nRF52
Tier 2
v1.26 v1.27
renesas-ra
Renesas RA family
Tier 2
v1.25 v1.26 v1.27
webassembly
Browsers and Node.js (PyScript runs here!)
Tier 2
v1.24 v1.26 v1.28
zephyr
Zephyr RTOS
Tier 2
v1.24 v1.25 v1.26 v1.27
cc3200
TI CC3200
Tier 3
v1.26 v1.27
esp8266
Espressif ESP8266
Tier 3
v1.25 v1.26 v1.27
pic16bit
Microchip PIC 16-bit
Tier 3
·
powerpc
IBM PowerPC (incl. Microwatt)
Tier 3
·
bare-arm
Minimum config — tracks core size
Tier M
v1.26 v1.27
minimal
Reference for new ports
Tier M
v1.27
qemu
Cortex-A/M, RISC-V 32 & 64 emulation
Tier M
v1.27

esp32 has ongoing financial support from Espressif (*). Greyed-out chips link to release pages that haven't been written yet. Full tier definitions are in the MicroPython support tiers documentation.

The machine.* standardisation arc

The strongest cross-release storyline of the last five releases is the steady push to standardise machine-module APIs across every port — so portable code really does run unchanged.

v1.24
network.ipconfig() IPv6-aware replacement for ifconfig(), plus portable network.PPP.
v1.25
Default I2C/SPI/UART Ports gain default-bus instances so cross-port code can drop the id arg.
v1.26
I2CTarget · Counter · Encoder New peripheral classes (target on 7 ports, counter/encoder on esp32 first).
v1.27
Hard-IRQ timers machine.Timer(hard=True) available on most ports (esp32 still soft-only).
v1.28
PWM & CAN everywhere machine.PWM on every Tier 1 & 2 port, standardised machine.CAN API across STM32 and friends.

Other recurring threads

Patterns worth noticing as you read across the releases.

RISC-V grows up

v1.24 ships the RV32 native emitter. v1.25 adds the asm_rv32 inline assembler. v1.26 optimises emitter output across all archs including RV32. v1.27 adds Zba opcodes and an RV64 qemu target. v1.28 picks up the Zcmp extension.

The ESP-IDF treadmill

v1.24 → IDF 5.2.2, v1.25 → 5.3/5.4, v1.26 → 5.4.2, v1.27 → 5.5.1. Each bump moves esp32 firmware size noticeably and unlocks new chips.

New STM32 families per release

STM32H7 octospi (v1.24), STM32N6 with ML accelerators (v1.26), STM32U5 low-power and an STM32F469 disco board (v1.27).

Native & viper emitter wins

Every release improves native code generation. Notable: Thumb v1 long-jump support (v1.26) lifted the function-size limit on RP2040, and Xtensa LX3 inline opcodes near feature-parity (v1.26).

mpremote ergonomics

Hash-based recursive copy (v1.24), rm -r + romfs (v1.25), fs tree + better df + ESP CDC detection (v1.26), DTR/RTS quirks ironed out (v1.27).

Zephyr port maturation

Threading (v1.24), Timer/WDT (v1.25), PWM/UART/SPI/I2C and boot.py/main.py at startup (v1.26), ADC + native FS VFS (v1.27).

asyncio everywhere

v1.24 enables top-level await of Task/ Event on the webassembly port. v1.25 makes implicit awaits implicit. v1.26 fixes scheduler edge cases. v1.27 adds IPv6 to asyncio.start_server().

TinyUSB consolidation

Common CDC code unified across esp32-S2/S3, mimxrt, renesas-ra, rp2 and samd in v1.24. ESP32 native USB stabilises through v1.26.1. stm32 starts adopting TinyUSB optionally in v1.27.